Anyone know how to get FSB Speed ?

Hi
Does anyone know how to get the FSB Speed, i can get the clock speed using rdtsc (Seems like a bit of a bodge to me), but is there any way to get the FSB and so the multiplier ?

Thanks

Comments

  • : Hi
    : Does anyone know how to get the FSB Speed, i can get the clock speed using rdtsc (Seems like a bit of a bodge to me), but is there any way to get the FSB and so the multiplier ?

    grab intel's software developer's manual Volume 3 and look up the MSR section. There isn't a universal way of doing it AFAIK, and I think some of the bits you need are in different MSRs on different CPUs. Ugh!

    There was also a snippet of something like this on this web page:
    www.plasma-online.de/english/upgrade/ tweak/overclock/oc_soft_fsb.html

    the relevant parts being:

    [quote]
    The particular bits that interest us are in the Model Specific Register (MSR) that lives at address 2Ah. Bits 25 to 22 of MSR 2Ah tell the CPU what multiplier to use in the PLL. The following table shows how the values of the bits in that register translate into clock ratios: Table 5-7. Pentium II Processor Family Power-On Configuration Register Bus Frequency to Core Frequency Ratio Bit Field
    D[25:22] Ratio of Core Frequency to Bus Frequency
    0010 4
    0011 2
    0101 7/2
    0110 9/2
    0100 2
    [/quote]

    So if you know the multiplier, and you know the end CPU speed as determined by the timestamp, you should be able to figure out the FSB, or a reasonable approximation.

    hopefully I've at least gotten you looking in the right direction.
    Unfortunately a lot of the information you need is spread across many intel documents, some of which are confidential.


    Good luck,

    -jeff!

  • : : Hi
    : : Does anyone know how to get the FSB Speed, i can get the clock speed using rdtsc (Seems like a bit of a bodge to me), but is there any way to get the FSB and so the multiplier ?
    :
    : grab intel's software developer's manual Volume 3 and look up the MSR section. There isn't a universal way of doing it AFAIK, and I think some of the bits you need are in different MSRs on different CPUs. Ugh!
    :
    : There was also a snippet of something like this on this web page:
    : www.plasma-online.de/english/upgrade/ tweak/overclock/oc_soft_fsb.html
    :
    : the relevant parts being:
    :
    : [quote]
    : The particular bits that interest us are in the Model Specific Register (MSR) that lives at address 2Ah. Bits 25 to 22 of MSR 2Ah tell the CPU what multiplier to use in the PLL. The following table shows how the values of the bits in that register translate into clock ratios: Table 5-7. Pentium II Processor Family Power-On Configuration Register Bus Frequency to Core Frequency Ratio Bit Field
    : D[25:22] Ratio of Core Frequency to Bus Frequency
    : 0010 4
    : 0011 2
    : 0101 7/2
    : 0110 9/2
    : 0100 2
    : [/quote]
    :
    : So if you know the multiplier, and you know the end CPU speed as determined by the timestamp, you should be able to figure out the FSB, or a reasonable approximation.
    :
    : hopefully I've at least gotten you looking in the right direction.
    : Unfortunately a lot of the information you need is spread across many intel documents, some of which are confidential.
    :
    :
    : Good luck,
    :
    : -jeff!
    :
    :
    ? I copied there code exactly and no matter what i do it crases on the line rdmsr ? ive managed to get the rdtsc and cpuid working fully yet rdmsr crashes, (im running an AMD Athlon) ? Any ideas ?

  • : ? I copied there code exactly and no matter what i do it crases on the line rdmsr ? ive managed to get the rdtsc and cpuid working fully yet rdmsr crashes, (im running an AMD Athlon) ? Any ideas ?


    Any MSR that is unsupported generates a protection fault (INT 0D).
    If you're doing this under windows, you have to be at ring 0. If you're doing this under DOS, you should install an INT 0D handler to deal with the MSR not being supported. (although according to the AMD Athlon spec I have, MSR #A2 is supposed to be there)

    To test your code out, I suggest reading MSR # 10h (same as timestamp counter) then once that works, try reading the one that crashes.

    Try reading MSR # C0000015h. Bits 27:24 are the bus clock multiplier, although I don't have any info on the meanings of such bits!

    -jeff!


Sign In or Register to comment.

Howdy, Stranger!

It looks like you're new here. If you want to get involved, click one of these buttons!

Categories