Welcome to the new platform of Programmer's Heaven! We apologize for the inconvenience caused, if you visited us from a broken link of the previous version. The main reason to move to a new platform is to provide more effective and collaborative experience to you all. Please feel free to experience the new platform and use its exciting features. Contact us for any issue that you need to get clarified. We are more than happy to help you.
I do a project to university test in vhdl.
I have to make a entity that implement the block phase generator of a DDS with the same features of AD7008 (Analog Devices). To have two different frequency register ( two input port of entity) to do FSK modulation behaving one bit (a inout bit of entity).
The data to two frequency register have to be send through a parallel 32 bit bus.
0 · ·