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I/O address & I/O memory

dssuresh6dssuresh6 Member Posts: 17
1)I have this fundamental doubt about I/O address and memory. There is something called 'memory address space' and 'I/O address space'. Suppose there is 32 MB RAM, then the memory (or system) address space is 0...32MB-1. Similarly, the I/O address space also start from 0...something? It looks like the I/O address space starts from 0..ffff. (this is my understanding, correct me if I'm wrong). My question is, whether this I/O address space is part of the RAM address space ie. 0..32MB-1. If this is the case, can anyone tell me where exactly the I/O addresses start in RAM (ie. in the 0..32MB-1 range?). If this is not the case, then how does CPU distinguish between memory address space and I/O address space, given an machine instruction which asks the CPU to load the value from some address?Also, some I/O ports can have a range of memory. What I understand is suppose an I/O port has an address range of x..x+3, what it means is, it has probably one or more registers inside it with a combined size of 4 bytes. For eg., let's say there are four registers inside an I/O port each of size 1 byte. Then if I address location x, then it means I'm referrring to register 1 inside the I/O port and so on. Is this correct?

2) Then there is something called I/O memory. What does this mean?

I expect clarification on these points.

thanks
--

Comments

  • LundinLundin Member Posts: 3,711
    : 1)I have this fundamental doubt about I/O address and memory. There is something called 'memory address space' and 'I/O address space'. Suppose there is 32 MB RAM, then the memory (or system) address space is 0...32MB-1. Similarly, the I/O address space also start from 0...something? It looks like the I/O address space starts from 0..ffff. (this is my understanding, correct me if I'm wrong). My question is, whether this I/O address space is part of the RAM address space ie. 0..32MB-1. If this is the case, can anyone tell me where exactly the I/O addresses start in RAM (ie. in the 0..32MB-1 range?). If this is not the case, then how does CPU distinguish between memory address space and I/O address space, given an machine instruction which asks the CPU to load the value from some address?Also, some I/O ports can have a range of memory. What I understand is suppose an I/O port has an address range of x..x+3, what it means is, it has probably one or more registers inside it with a combined size of 4 bytes. For eg., let's say there are four registers inside an I/O port each of size 1 byte. Then if I address location x, then it means I'm referrring to register 1 inside the I/O port and so on. Is this correct?
    :
    : 2) Then there is something called I/O memory. What does this mean?
    :
    : I expect clarification on these points.
    :
    : thanks
    : --
    :
    :


    The term "address space" generally refers to the area where you can map different parts of the memory. It is probably 0-FFFF or 0-FFFFFFFF.

    The I/O parts has its own registers, which also must have a memory location. They might be implemented either in the hardware or in RAM cells, but don't confuse that with the general-purpose RAM.
    It is not very usefull to have registers mapped at the same address as for example the RAM, but it is possible on some devices. What will happen then, is that the part that has the highest priority will get that address.

    For example if you map I/O registers and RAM at the same area, the RAM will probably be hidden "behind" the registers and not accessible. How this works, and what has highest priority, are device-dependant. The manual of the device has probably got recommendations of how to map the memory, if it even allows mapping.

  • dssuresh6dssuresh6 Member Posts: 17
    THANKS FOR REPLYING. I EXPECT U TO READ MY FIRST MESSAGE AGAIN SO THAT U CAN UNDERSTAND MY DOUBTS BETTER. I HAVE REPLIED TO YOUR REPLY AND MY REPLY IS IN CAPS, INTERSPERSED IN YOUR REPLY.

    : : 1)I have this fundamental doubt about I/O address and memory. There is something called 'memory address space' and 'I/O address space'. Suppose there is 32 MB RAM, then the memory (or system) address space is 0...32MB-1. Similarly, the I/O address space also start from 0...something? It looks like the I/O address space starts from 0..ffff. (this is my understanding, correct me if I'm wrong). My question is, whether this I/O address space is part of the RAM address space ie. 0..32MB-1. If this is the case, can anyone tell me where exactly the I/O addresses start in RAM (ie. in the 0..32MB-1 range?). If this is not the case, then how does CPU distinguish between memory address space and I/O address space, given an machine instruction which asks the CPU to load the value from some address?Also, some I/O ports can have a range of memory. What I understand is suppose an I/O port has an address range of x..x+3, what it means is, it has probably one or more registers inside it with a combined size of 4 bytes. For eg., let's say there are four registers inside an I/O port each of size 1 byte. Then if I address location x, then it means I'm referrring to register 1 inside the I/O port and so on. Is this correct?
    : :
    : : 2) Then there is something called I/O memory. What does this mean?
    : :
    : : I expect clarification on these points.
    : :
    : : thanks
    : : --
    : :
    : :
    :
    :
    : The term "address space" generally refers to the area where you can map different parts of the memory. It is probably 0-FFFF or 0-FFFFFFFF.
    :
    : The I/O parts has its own registers, which also must have a memory location. They might be implemented either in the hardware or in RAM cells, but don't confuse that with the general-purpose RAM.

    ==> IF THEY ARE NOT IMPLEMENTED IN RAM ie. THEY ARE IMPLEMENTED IN HARDWARE, THEN IF I ASK THE CPU TO LOAD/STORE A VALUE AT 'X' LOCATION, THEN HOW DOES THE CPU KNOW THAT THE 'X' LOCATION REFER TO THE I/O ADDRESS OR MEMORY ADDRESS? IN ASSEMBLY, ARE THERE TWO TYPES OF INSTRUCTIONS, ONE REFERRING TO MEMORY(RAM CELLS) AND THE OTHER REFERRRING TO I/O ADDRESSES?

    : It is not very usefull to have registers mapped at the same address as for example the RAM, but it is possible on some devices. What will happen then, is that the part that has the highest priority will get that address.
    :
    ==> MY DOUBT IS, IS THERE SOMETHING A 'GENERAL ADDRESS SPACE' STARTING FROM 0...M...N, WHERE THE RAM CELLS OCCUPY 0..M AND THE I/O REGISTERS OCCUPY M..N? INSTEAD, IF RAM CELLS ARE ADDRESSED 0..M AND I/O REGISTERS ARE ALSO ADDRESSED 0....K (SAY), GIVEN A MACHINE INSTRUCTION 'LOAD A VALUE AT ADDRESS 2' WILL REFER TO THE MEMORY CELL AT ADDRESS 2 IN RAM OR THE I/O REGISTER AT ADDRESS 2 IN THE I/O ADDRESS SPACE? IF THE I/O REGISTERS ARE MAPPED IN THE RAM ADDRESS SPACE ITSELF, THEN THE CPU KNOWS THAT ANY ADDRESS STARTING ON OR AFTER M AND UNTIL N REFERS TO I/O REGISTERS. BUT IF THE I/O REGISTERS ARE NOT MAPPED IN THE RAM ADDRESS SPACE, THEN HOW DOES THE CPU DISTINGUISH BETWEEN THE TWO?

    I HOPE U UNDERSTOOD MY DOUBT.

    THEN WHAT IS THIS I/O MEMORY? IT IS NOTHING BUT THE CONTENTS OF THE REGISTER STARTING AT A PARTICULAR ADDRESS (EITHER IN I/O ADDRESS SPACE OR RAM ADDRESS SPACE?) AS I'VE EXPLAINED IN MY FIRST POST?

    : For example if you map I/O registers and RAM at the same area, the RAM will probably be hidden "behind" the registers and not accessible. How this works, and what has highest priority, are device-dependant. The manual of the device has probably got recommendations of how to map the memory, if it even allows mapping.

    ==> I FIND NO WEBSITE WHICH EXPLAINS THESE FUNDAMENTAL CONCEPTS CLEARLY.
    :

  • sandyARMsandyARM Member Posts: 9
    I/O address space is physically different from the memory address space.
    it is highly dependent on the Processor you are using.

    say a 32 bit processor have address space < 0000 0000 - FFFF FFFF>
    now I can map a ROM from < 0000 0000 - 0000 FFFF > Static RAM on
    < 0100 0000 - 0100 FFFF> A Flash memory at other address space etc.

    And if some peripheral devices are interfaced to the processor and they have some registers which can be memory mapped then they can be given a slot in these 32 bit address range.

    Well but if the processor supports I/O address space that is anoter range of address ex :<00 -FF> . ie this is the range which is accessed via special IO/ Read Write instructions insted of the conventional memory Read write instructions.

    Hope this clarifies.









    : THANKS FOR REPLYING. I EXPECT U TO READ MY FIRST MESSAGE AGAIN SO THAT U CAN UNDERSTAND MY DOUBTS BETTER. I HAVE REPLIED TO YOUR REPLY AND MY REPLY IS IN CAPS, INTERSPERSED IN YOUR REPLY.
    :
    : : : 1)I have this fundamental doubt about I/O address and memory. There is something called 'memory address space' and 'I/O address space'. Suppose there is 32 MB RAM, then the memory (or system) address space is 0...32MB-1. Similarly, the I/O address space also start from 0...something? It looks like the I/O address space starts from 0..ffff. (this is my understanding, correct me if I'm wrong). My question is, whether this I/O address space is part of the RAM address space ie. 0..32MB-1. If this is the case, can anyone tell me where exactly the I/O addresses start in RAM (ie. in the 0..32MB-1 range?). If this is not the case, then how does CPU distinguish between memory address space and I/O address space, given an machine instruction which asks the CPU to load the value from some address?Also, some I/O ports can have a range of memory. What I understand is suppose an I/O port has an address range of x..x+3, what it means is, it has probably one or more registers inside it with a combined size of 4 bytes. For eg., let's say there are four registers inside an I/O port each of size 1 byte. Then if I address location x, then it means I'm referrring to register 1 inside the I/O port and so on. Is this correct?
    : : :
    : : : 2) Then there is something called I/O memory. What does this mean?
    : : :
    : : : I expect clarification on these points.
    : : :
    : : : thanks
    : : : --
    : : :
    : : :
    : :
    : :
    : : The term "address space" generally refers to the area where you can map different parts of the memory. It is probably 0-FFFF or 0-FFFFFFFF.
    : :
    : : The I/O parts has its own registers, which also must have a memory location. They might be implemented either in the hardware or in RAM cells, but don't confuse that with the general-purpose RAM.
    :
    : ==> IF THEY ARE NOT IMPLEMENTED IN RAM ie. THEY ARE IMPLEMENTED IN HARDWARE, THEN IF I ASK THE CPU TO LOAD/STORE A VALUE AT 'X' LOCATION, THEN HOW DOES THE CPU KNOW THAT THE 'X' LOCATION REFER TO THE I/O ADDRESS OR MEMORY ADDRESS? IN ASSEMBLY, ARE THERE TWO TYPES OF INSTRUCTIONS, ONE REFERRING TO MEMORY(RAM CELLS) AND THE OTHER REFERRRING TO I/O ADDRESSES?
    :
    : : It is not very usefull to have registers mapped at the same address as for example the RAM, but it is possible on some devices. What will happen then, is that the part that has the highest priority will get that address.
    : :
    : ==> MY DOUBT IS, IS THERE SOMETHING A 'GENERAL ADDRESS SPACE' STARTING FROM 0...M...N, WHERE THE RAM CELLS OCCUPY 0..M AND THE I/O REGISTERS OCCUPY M..N? INSTEAD, IF RAM CELLS ARE ADDRESSED 0..M AND I/O REGISTERS ARE ALSO ADDRESSED 0....K (SAY), GIVEN A MACHINE INSTRUCTION 'LOAD A VALUE AT ADDRESS 2' WILL REFER TO THE MEMORY CELL AT ADDRESS 2 IN RAM OR THE I/O REGISTER AT ADDRESS 2 IN THE I/O ADDRESS SPACE? IF THE I/O REGISTERS ARE MAPPED IN THE RAM ADDRESS SPACE ITSELF, THEN THE CPU KNOWS THAT ANY ADDRESS STARTING ON OR AFTER M AND UNTIL N REFERS TO I/O REGISTERS. BUT IF THE I/O REGISTERS ARE NOT MAPPED IN THE RAM ADDRESS SPACE, THEN HOW DOES THE CPU DISTINGUISH BETWEEN THE TWO?
    :
    : I HOPE U UNDERSTOOD MY DOUBT.
    :
    : THEN WHAT IS THIS I/O MEMORY? IT IS NOTHING BUT THE CONTENTS OF THE REGISTER STARTING AT A PARTICULAR ADDRESS (EITHER IN I/O ADDRESS SPACE OR RAM ADDRESS SPACE?) AS I'VE EXPLAINED IN MY FIRST POST?
    :
    : : For example if you map I/O registers and RAM at the same area, the RAM will probably be hidden "behind" the registers and not accessible. How this works, and what has highest priority, are device-dependant. The manual of the device has probably got recommendations of how to map the memory, if it even allows mapping.
    :
    : ==> I FIND NO WEBSITE WHICH EXPLAINS THESE FUNDAMENTAL CONCEPTS CLEARLY.
    : :
    :
    :

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